View MP3423GG-Z_8853245.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

mp3423 9a, 600khz high efficiency, synchronous step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 1 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. the future of analog ic technology description the mp3423 is a high-efficiency, synchronous, current-mode, step-up converter with output disconnect. the mp3423 starts up from an input voltage as low as 1.9v, while providing inrush current limiting and output short-circuit protection. the integrated p-channel synchronous rectifier improves efficiency and eliminates the need for an external schottky diode. this p-channel disconnects the output from the input during shutdown. the 600khz switching frequency allows small external components, while the internal compensation and soft-start minimize external component count. the mp3423 provides a compact solution for a 5v output, 3.1a load requirement, using a supply voltage down to 2.8v. the mp3423 is available in 14-pin qfn 2mmx2mm package. features ? up to 98% efficiency ? 1.9v to 5.5v input range ? 2.5v to 5.5v output range ? internal synchronous rectifier ? 600khz fixed switching frequency ? 9a typical switch current limit ? 43ua quiescent current ? high efficiency over full load range ? internal soft-start and compensation ? true output load disconnect from input ? ocp, scp, ovp and otp protection ? small 2x2mm qfn14 package applications ? battery-powered products ? power banks, juice packs, battery back-up units ? usb power supply ? consumer electronic accessories ? tablets a ll mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. typical application
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 2 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. ordering information part number* package top marking mp3423gg qfn-14 (2mmx2mm) see blow * for tape & reel, add suffix ?z (e.g. mp3423gg?z) top marking da: product code of mp3423gg; y: year code; lll: lot number; package reference top view 1 pgnd 2 pgnd 3 sw 4 out 5 6 12 11 10 9 8 7 in en nc out out fb agnd ina 13 pgnd 14 sw
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 3 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. absolute maximum ratings (1) sw pin ............... -0.3v to +6.5v (10v for <5ns) all other pins .............................. -0.3v to +6.5v continuous power dissipation (t a = +25c) (2) .......................................................... 1.56w junction temperature .............................. 150 c lead temperat ure ................................... 260 c storage temperature ............... -65 c to +150 c recommended operating conditions (3) supply voltage v in ......................... 1.9v to 5.5v v out ............................................... 2.5v to 5.5v operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc qfn-14 (2mmx2mm) ............ 80 ....... 16 c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation a t any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanen t damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 4 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. electrical characteristics v in = v en = 3.3v, v out = 5v, t j = -40c to125c, typical values are tested at t j =25c, unless otherwise noted. parameters symbol condition min. typ. max. units v oltage range start operating input voltage v in 1.9 5.5 v quiescent current i q_ns v en =v in =3.3v, v out =5v, no load measured on out pin, t j =25c 43 57 a v en =v in =3.3v, v out =5v, no load measured on in pin 0.3 a shutdown current i sd v en =v out =0v, measured on in pin, t j =25c 0.1 1 a in uvlo rising threshold v uvlo in-r v in rising t j =25c 1 1.3 1.6 v in uvlo falling threshold v uvlo in-f v in falling, v out =5v 650 mv vout start switching rising threshold v uvlo_out-r t j =25c 1.7 1.79 v step-up converter operation frequency f sw t j =25c 500 600 700 khz -40c t j 125c 440 600 760 feedback voltage v fb t j =25c 795 807 819 mv -40c t j 125c 791 807 823 feedback input current i fb v fb =850mv 1 50 na nmos on-resistance r nds on 11 m ? nmos leakage current i nlk v sw =5v 100 na pmos on-resistance r pds on 16 m ? pmos leakage current i plk v sw =5v, v out =0v 0.1 a maximum duty cycle d max 90 95 % linear charge current limit (5) i ch_limit v out =1.7v 0.7 a v out =0v 0.2 a nmos current limit (5) i sw limit1 v in =5v, v out =3.3v 4 a i sw limit2 duty=44%, vin=2.8v, v out =5v 9 a logic interface en high-level voltage v en h 1.2 v en low-level voltage v en l 0.4 v en input current i en connect to v in 10 na protection thermal shutdown (5) 150 c over temperature hysteresis (5) 20 c notes: 5) guaranteed by characterization, not production tested
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 5 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical characteristics v in = 3.3v, v out = 5v, l=1.5uh, t a = 25c, unless otherwise noted.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 6 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical characteristics (continued) v in = 3.3v, v out = 5v, l=1.5uh, t a = 25c, unless otherwise noted.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 7 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics (continued) v in = 3.3v, v out = 5v, l=1.5uh, t a = 25c, unless otherwise noted.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 8 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics (continued) v in = 3.3v, v out = 5v, l=1.5uh, t a = 25c, unless otherwise noted.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 9 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics (continued) v in = 3.3v, v out = 5v, l=1.5uh, t a = 25c, unless otherwise noted.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 10 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. pin functions pin # name pin function 1, 2, 13 pgnd power ground. 3, 14 sw power switch output. sw is the connection node of the internal nmos switch and synchronous switch. connect the power inductor between sw and input power. keep these pcb trace lengths as short and wide as possible to reduce emi and voltage spikes. 4, 5, 6 out output pin. out is the drain of the internal synchronous rectifier mosfet. bias is derived from out when v out is higher than v in . pcb trace length from out to the output filter capacitor(s) should be as short and wide as possible. out is completely disconnected from in when en is low due to the output disconnect feature. 7 nc no connect. reserved for factory use only. float or connect this pin to gnd in the application. 8 en chip enable control input. 9 in power supply input. the startup bias is derived from in. must be locally bypassed. once out exceeds in, bias comes from out. thus, once started, operation is completely independent from in. 10 ina power supply input for factory use only, must be connected to in pin in the application. 11 agnd analog signal ground. 12 fb feedback input to error amplifier. connect resistor divider tap to this pin. the output voltage can be adjusted from 2.5v to 5.5v
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 11 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. function diagram cout voutgood 1.7v pwm control slope comp sync drive control enable control 0.8v ref body control vin startup b c ea cp r1 r2 rc cc enable osc 600khz cin l1 pwm comparator undervoltage lockout vref in en fb pgnd out sw agnd current limit scp/ovp a rt ina figure 1: functional block diagram
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 12 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. operation the mp3423 is a 600khz, synchronous step-up converter with true output disconnect. it is packaged in a qfn 2x2-14 lead package. the device features fixed-frequency current mode pwm controls for excellent line and load regulation. internal soft-start and loop compensation simplifies the design process and minimizes external components. the internal low rdson mosfets, combined with frequency stretching operation, enables the device to maintain high efficiency over a wide load current range. start-up when the ic is enabled and the voltage on the in pin exceeds v uvlo_in-r , the mp3423 starts up in the linear charge period. during this linear charge period, the pmos rectifier turns on until the output capacitor is charged to 1.7v. the pmos current is limited to 0.2a when vout is 0v to avoid inrush current. while the output ramps up, the pmos current limit also increases and ramps to 0.7a at 1.7v output. this circuit also helps to limit the output current under short circuit conditions. once the output is charged to 1.7v, the linear charge period elapses and the mp3423 starts switching in normal closed loop operation. in normal operation, with vo lower than vin+0.3v the mp3423 operates in step down mode with 4a typical peak current limit, and works in boost mode when vo is higher than vin+0.3v with 9a typical peak current limit. table 1: work mode during startup v out <1.7v linear charge mode v out 1.7v & v out < v in + 0.3v down mode v out 1.7v & v out v in + 0.3v boost mode in down mode, gate of hs-fet is pulled to vin, and it works with high impedance when hs- fet is on, the power-loss is high and regulation is bad in down mode. down mode is designed for work in startup and scp condition, it is not suggested to set mp3423 in down mode in normal work, unless the thermal and regulation will not affect the system performance. once the output voltage exceeds the input voltage, the mp3423 powers its internal circuits from vout instead of vin. soft-start the mp3423 provides soft-start by charging an internal capacitor with a current source. this soft start voltage continues to rise, following the fb voltage, during the linear charge period. once the linear charge period elapses, and the voltage on this capacitor is charged, the reference voltage is slowly ramped up. the reference soft start time is typically 2ms from 0v to 0.807v. the soft start capacitor is discharged completely in the event of a commanded shutdown, thermal shutdown or short circuit at the output. device enable operation is enabled when the en pin is switched high and placed into shutdown mode when low. in shutdown mode, the regulator stops switching and all internal control circuitry is off. the load is isolated from the input. power-save mode the mp3423 will automatically enter power save mode (psm) when the load decreases and resume pwm mode when the load increases. when the device goes into psm, it lowers the switching frequency saving switching and driver losses, and switches to pulse skip mode if the load continues to decrease. error amplifier the error amplifier (ea) is an internally- compensated amplifier. the ea compares the internal 0.807v reference voltage against v fb to generate an error signal. the output voltage of the mp3423 is adjusted by an external resistor divider. a voltage divider from v out to ground programs the output voltage via the fb pin from 2.5v to 5.5v using the equation: v out =0.807v x (1+r1/r2) set the value of r1 and r2 to achieve low quiescent current. r1 values larger than 600k are recommended for good stability and transient balance.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 13 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. current sensing lossless current sensing converts the nmos switch current signal to a voltage which is summed with the internal slope compensation. the summed signal is compared to the error amplifier output to provide a peak current control command for the pwm. typical peak switch current limit is 9a. the switch current signal is blanked for about 60ns internally to enhance noise rejection. output disconnect the mp3423 is designed to allow true output disconnect by eliminating body diode conduction of the internal pmos rectifier. this allows v out to go to zero volts during shutdown, or isolate and maintain an external bias on v out . it also allows for inrush current limit at start-up, minimizing surge current seen by the input supply. to obtain the advantage of output disconnect, there must not be an external schottky diode connected between the switch pin and v out . over load and short circuit protection when an overload or a short circuit occurs, the output voltage will drop. if vout drops below vin+0.3v, the mp3423 will convert to step down mode. if vout drops below 1.7v, the device will convert to linear charge mode. if vout drops below about 70% of the nominal output voltage, the mp3423 will immediately shut down and re- start after about 40 s as a new power-on cycle. over voltage protection if vout is higher than 7v, boost switching stops. this prevents overvoltage from damaging the internal power mosfet. when the output drops below 7v, the device resumes switching automatically. thermal shutdown the device contains an internal temperature monitor. the switches turn off if the die temperature exceeds 150c. the device will resume normal operation below 130c.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 14 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. application information component selection input capacitor selection low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. ceramic capacitors are a good choice for input decoupling and should be located as close as possible to the device. a ceramic capacitor larger than 22 f is recommended to restrain v in ripple. output capacitor selection the output capacitor requires a minimum capacitance value of 22 f at the programmed output voltage to ensure stability over the full operating range. a higher capacitance value may be required to lower the output ripple and transient ripple. low esr capacitors such as x5r or x7r type ceramic capacitors are recommended. supposing that esr is zero, the minimum output capacitor to support the ripple in the pwm mode could be calculated by: oout ( max ) in ( min ) o sout(max) i(v v ) c fv v ? where, v out(max) = maximum output voltage v in(min) = minimum input voltage i o =output current f s = switching frequency v= acceptable output ripple a 1 f ceramic capacitor is recommended between the out and pgnd pins. this reduces spikes on the sw node and improves emi performance. inductor selection the mp3423 can utilize small surface mount chip inductors due to its 600khz switching frequency. inductor values between 1 h and 2.2 h are suitable for most applications. larger values of inductance will allow slightly greater output current capability by reducing the inductor ripple current, but larger value inductance increases component size. the minimum inductance value is given by: in(min) out(max) in(min) out(max) l s v(v v) l vif ? (3) i l =acceptable inductor current ripple the inductor current ripple is typically set for 30% to 40% of the maximum inductor current. the inductor should have low dcr (series resistance of the inductor current without saturating windings) to reduce the resistive power loss. the saturated current (i sat ) should be large enough to support the peak current. pcb layout considerations pcb layout for high frequency switching power supplies can be critical. poor layout can result in reduced performance, excessive emi, resistive loss and system instability. the steps below ensure good layout design. 1. the output capacitor must be placed as close as possible to the out pin, with minimal distance to pgnd. a small decoupling capacitor should be paralleled with the bulk output capacitor and placed as close as possible to the out pin. this is very important to reduce the spikes on the sw pin and improve emi performance. 2. the input capacitor and inductor should as close as possible to the in and sw pins. the trace between the inductor and the sw pin should be wide and as short as possible. 3. the feedback loop should be far away from all noise sources such as the sw pin. the feedback divider resistors should be as close as possible to the fb and agnd pins. 4. the ground return of the input/output capacitors should be tied as close as possible to the pgnd pin with a large copper gnd area. vias around the gnd pin are recommended to lower the die temperature. 5. ina pin must be connected to in. nc pin can either float or be connected to gnd.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 15 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. figure 2 recommends components placement for mp3423. en in ina nc pgnd out fb agnd sw top layer bottom layer via vout vin pgnd pgnd pgnd pgnd sw out sw out mp3423 l1 c2a c2b c1 r1 r2 vias for heat sink figure 2: layout recommendation design example below is a design example following the application guidelines for the following specifications: table 2, design example v in 2.8v-4.2v v out 5v i out 0a-3.1a the typical application circuit for v out = 5v in figure 3 shows the detailed application schematic, and is the basis for the typical performance waveforms. for more detailed device applications, please refer to the related evaluation board datasheets.
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package mp3423 rev. 1.01 www.monolithicpower.com 16 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical application circuits mp3423 sw l1 1.5uh out in agnd fb en r1 787k ? r2 150k ? c2a 1uf vout vin pgnd 5v c1b 22uf c1a 22uf c2b 22uf c2c 22uf ina figure 3: typical boost application circuit, v in =2.8v to 4.2v, v out =5v, i out =0a-3.1a
mp3423?9a, 600khz high efficiency, synchronous, step-up converter with output disconnect in 2x2mm qfn package notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp3423 rev.1.01 www.monolithicpower.com 17 9/28/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. package information qfn14 (2mmx2mm) side view bottom view note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeters max. 4) jedec reference is mo-220. 5) drawing is not to scale. pin 1 id marking top view pin 1 id index area recommended land pattern pin 1 id

▲Up To Search▲

Price & Availability of MP3423GG-Z

	To Download MP3423GG-Z Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .